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| NTMFS4821N Power MOSFET Features 30 V, 58.5 A, Single N-Channel, SO-8 FL * * * * * * * * * Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Thermally Enhanced SO-8 Package These are Pb-Free Device Refer to Application Note AND8195/D CPU Power Delivery DC-DC Converters High Side Switching MAXIMUM RATINGS (TJ = 25C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA v 10 sec Power Dissipation RqJA, t v 10 sec Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C TA = 25C PD IDM IDmaxpkg TJ, TSTG IS dV/dt EAS PD ID PD ID PD ID Symbol VDSS VGS ID Value 30 20 13.8 10 2.14 22.4 16.1 5.61 8.8 6.4 0.87 58.5 42.3 38.5 117 100 -55 to +150 38.5 6 86 W A A C A V/ns mJ NTMFS4821NT3G W A W A 1 http://onsemi.com V(BR)DSS 30 V RDS(ON) MAX 6.95 mW @ 10 V 10.8 mW @ 4.5 V ID MAX 58.5 A Applications D (5,6) Unit V V A S (1,2,3) W A N-CHANNEL MOSFET G (4) MARKING DIAGRAM D S S S G 4821N AYWWG G D D SO-8 FLAT LEAD CASE 488AA STYLE 1 D A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location) Current limited by package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt ORDERING INFORMATION Device NTMFS4821NT1G Package SO-8FL (Pb-Free) SO-8FL (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel Single Pulse Drain-to-Source Avalanche Energy (VDD = 50 V, VGS = 10 V, IL = 24 Apk, L = 0.3 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8" from case for 10 s) TL 260 C For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. (c) Semiconductor Components Industries, LLC, 2010 January, 2010 - Rev. 3 1 Publication Order Number: NTMFS4821N/D NTMFS4821N THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - Steady State (Note 2) Junction-to-Ambient - t v 10 sec 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA RqJA Value 3.25 58.3 144.1 22.3 C/W Unit ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS IGSS VGS(TH) VGS(TH)/TJ RDS(on) VGS = 10 V to 11.5 V VGS = 4.5 V Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 13.3 38 16.6 3.8 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 11.5 V, VDS = 15 V, ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 12 V 1400 282 136 10.7 1.4 4.1 3.8 25 nC 16 nC pF gFS ID = 30 A ID = 15 A ID = 30 A ID = 15 A VDS = 1.5 V, ID = 30 A 5.3 5.2 8.6 8.4 54 S 10.8 6.95 mW VGS = 0 V, VDS = 24 V TJ = 25 C TJ = 125C VGS = 0 V, ID = 250 mA 30 25 1 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance VDS = 0 V, VGS = 20 V VGS = VDS, ID = 250 mA 1.45 1.8 2.5 V mV/C 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTMFS4821N ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR ta tb QRR LS LD LG RG TA = 25C 0.5 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.85 0.74 11 7.5 3.5 2.0 nC ns 1.0 V td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 8.2 20 23 3.1 ns Symbol Test Condition Min Typ Max Unit Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance 1.3 0.005 1.84 1.1 2.0 nH W 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 NTMFS4821N 90 80 ID, DRAIN CURRENT (A) 70 60 50 40 30 20 10 0 0 1 2 3 4 5 TJ = 25C 5.0 V 10 V VGS = 4.5 V 4.0 V 3.8 V 3.6 V 3.4 V 3.2 V 3.0 V 2.8 V 2.6 V 6 ID, DRAIN CURRENT (A) 100 90 80 70 60 50 40 30 20 10 0 0 TJ = 125C TJ = 25C 1 2 TJ = -55C 3 4 5 6 VDS 10 V VDS, DRAIN-TO-SOURCE VOLTAGE (V) VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.04 ID = 30 A TJ = 25C 0.03 0.0195 0.017 0.0145 0.012 0.0095 0.007 0.0045 0.002 30 Figure 2. Transfer Characteristics TJ = 25C VGS = 4.5 V 0.02 0.01 VGS = 11.5 V 0 2 4 6 8 10 40 50 60 70 80 90 100 VGS, GATE-TO-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On-Resistance vs. Gate-to-Source Voltage 1.8 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.6 1.4 1.2 1 0.8 0.6 10 ID = 30 A VGS = 10 V IDSS, LEAKAGE (nA) 1000 10000 Figure 4. On-Resistance vs. Drain Current and Gate Voltage VGS = 0 V TJ = 150C TJ = 125C 100 -50 -25 0 25 50 75 100 125 150 5 10 15 20 25 30 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage http://onsemi.com 4 NTMFS4821N VGS, GATE-TO-SOURCE VOLTAGE (V) 2000 1800 C, CAPACITANCE (pF) 1600 1400 1200 1000 800 600 400 200 0 0 Coss Crss 5 10 15 20 25 TJ = 25C Ciss 12 QT 10 8 6 4 2 0 Qgs Qgd VGS ID = 30 A TJ = 25C 0 4 8 12 16 20 24 30 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge 30 1000 VDD = 15 V ID = 30 A VGS = 11.5 V 100 t, TIME (ns) td(off) tf tr 10 td(on) IS, SOURCE CURRENT (A) 25 20 15 10 5 0 0.2 VGS = 0 V TJ = 25C 1 1 10 RG, GATE RESISTANCE (W) 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance 1000 VGS = 20 V Single Pulse TC = 25C 100 EAS, SINGLE PULSE DRAIN-TO- SOURCE AVALANCHE ENERGY (mJ) 90 80 70 60 50 40 30 20 10 0 Figure 10. Diode Forward Voltage vs. Current ID = 24 A ID, DRAIN CURRENT (A) 100 10 ms 100 ms 1 ms 10 ms dc 10 1 0.1 0.1 RDS(on) Limit Thermal Limit Package Limit 1 10 100 25 50 75 100 125 150 VDS, DRAIN-TO-SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE(C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 NTMFS4821N 90 80 70 60 gFS (S) Id (A) 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 0.1 0.1 1 10 100 1000 10000 10 VDS = 1.5 V 125C 100 100C 25C 1 Figure 13. gFS vs. Drain Current DRAIN CURRENT (A) Figure 14. Avalanche Characteristics PULSE WIDTH (ms) http://onsemi.com 6 NTMFS4821N PACKAGE DIMENSIONS DFN6 5x6, 1.27P (SO8 FL) CASE 488AA-01 ISSUE C 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D 2 6 A B 5 2X D1 0.20 C E1 2 E c 4X q A1 1 2 3 4 TOP VIEW 3X C SEATING PLANE 0.10 C A 0.10 C SIDE VIEW 8X e DETAIL A DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --- 4.22 6.15 BSC 5.50 5.80 6.10 3.45 --- 4.30 1.27 BSC 0.51 0.61 0.71 0.51 --- --- 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _ DETAIL A SOLDERING FOOTPRINT* 1.270 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 3X b e/2 1 4 0.750 4X 0.10 0.05 CAB c L 1.000 4X 0.965 1.330 0.495 3.200 0.475 2X 2X K E2 L1 6 5 0.905 4.530 2X M G D2 BOTTOM VIEW 1.530 4.560 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 7 NTMFS4821N/D |
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